1. Field of the Invention
The present invention relates to a semiconductor device of an MCP (Multi-Chip Package) structure, which has a plurality of semiconductor chips.
This application relies for priority on Japanese patent application, Serial Number 399728/2001, filed Dec. 28, 2001, which is incorporated herein by reference in its entirety.
2. Description of the Related Art
FIG. 1 is a cross-sectional view showing a structure of a conventional semiconductor device having an MCP structure.
The semiconductor device has a first chip 10 and a second chip 20 and is one of an MCP type wherein these are mounted over a substrate 30 so as to overlap each other and the surfaces thereof are sealed up with a resin.
The first chip 10 comprises bumps 13 made of gold and a semiconductor substrate 11 having a surface, i.e., a circuit forming surface. The bumps 13 are formed on corresponding bonding pads 12 provided on the surface of the semiconductor substrate 11. The second chip 20 includes a semiconductor substrate 21 having a surface, i.e., a circuit forming surface. Bonding pads 22 are provided on the surface of the semiconductor substrate 21.
The substrate 30 comprises an insulating base member 31. The substrate 30 mounts the first chip 10 and the second chip 20 thereon and electrically and mechanically connects them to a printed wiring board or the like. In such a substrate 30, bonding pads 32 are formed on a chip mounting surface of the insulating base member 31, and ball pads 33 are formed on an external connecting surface thereof. The bonding pads 32 and the ball pads 33 are formed so as to oppose each other with the base member 31 interposed therebetween, and conductive via posts 34 electrically connect between these. Further, solder bumps 35 for connection to the printed wiring board or the like are respectively formed on the ball pads 33.
The first chip 10 is flip-chip connected to the substrate 30. Namely, a circuit forming surface of the first chip 10 is mounted over a chip mounting surface of the substrate 30 so as to face each other. The bonding pads 32 on the substrate 30 and the bonding pads 12 on the first chip 10 are respectively electrically connected to one another by means of the bumps 13. Further, the substrate 30 and the first chip 10 are fixed with an anisotropic conductive or non-conductive adhesive 41.
The back or reverse surface of the second chip 20 is fixed to the back surface of the first chip 10 with an adhesive 42. The bonding pads 22 provided on the front surface of the second chip 20, and the bonding pads 32 on the substrate 30 are respectively connected to one another by wires 43 such as gold wires by using a wire bonding technology. The balls 23 which are formed in a process for wire bonding are respectively formed on the bonding pads 22. The first chip 10, the second chip 20 and the wires 43 or the like are sealed up with a sealing resin 44 and thus these are protected from external environments.
However, in the process for fabricating of the conventional semiconductor device, the anisotropic conductive or non-conductive adhesive 41 is used to fix the first chip 10 to the substrate 30. Therefore, the following problems have arisen.
Namely, a problem arises in that since the adhesive 41 is normally hygroscopic, it easily absorbs moisture in a process for fabricating a package or under use environments of the package subsequent to the completion of its manufacture, thereby making it easy to peel off. A further problem arises in that when such a semiconductor device is mounted on a printed wiring board or the like and connected thereto by reflow, the moisture absorbed by the adhesive 41 is vaporized by heat of the reflow, thereby causing an explosion, whereby the semiconductor device is damaged and an electrical connection between the substrate 30 and the first chip 10 is broken.
Consequently, a semiconductor device of an MCP structure having an improved moisture resistance and reflow resistance has been demanded.
According to one aspect of the present invention, there is provided a semiconductor device which includes a package substrate which has first and second major surfaces and which has first and second electrode pads formed on the first major surface, and which has first external terminals formed on the second major surface and electrically connected to the corresponding first and second electrode pads.
The semiconductor device further includes a first semiconductor chip which has third and fourth major surfaces and which has third electrode pads formed on the third major surface and which has second external terminals and which has conductive members electrically connected to the corresponding second external terminals and the third electrode pads, and which has a first sealing resin sealing the third major surface and the conductive members except contact portions between the second external terminals and the conductive members, the second external terminals being connected to the corresponding first electrode pads.
The semiconductor device also includes a second semiconductor chip which has a fifth major surface mounted over the fourth major surface and a sixth major surface and which has fourth electrode pads formed on the sixth major surface and bonding wires which connect the fourth electrode pads and the second electrode pads, and a second sealing resin which seals the bonding wires and the second electrode pads, and the first and second semiconductor chips.
The above and further objects and novel features of the invention will more fully appear from the following detailed description, appended claims and the accompanying drawings.